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HomeFacultyElectricalEngineeringNihar Ranjan Mohapatra
Nihar Ranjan Mohapatra
Assistant Professor
 

B.E.: VSSUT , Odisha, 1998
Ph.D.: IIT Bombay, 2003

Email: nihar @ iitgn.ac.in
Phone: +91-79-32455012
Fax: +91-79-23972622
 
Research Interest
  • Novel semiconductor device design
  • Nanoscale devices and Memory devices
  • Semiconductor process development
  • Reliability of semiconductor devices
  • Analog Circuits

Work Experience
  • Assistant Professor, Indian Institute of Technology, Gandhinagar, (July 2011 – present)
  • Member of Technical Staff, GLOBALFOUNDRIES, Dresden, Germany (Feb 2009- June 2011 )
  • Sr. Technology and Integration Engineer, Advanced Micro Devices (AMD), Dresden, Germany (Oct. 2006 – Jan. 2009)
  • Member of Scientific Staff, IHP Microelectronics, Frankfurt (Oder), Germany (July 2003 – Sept 2006)
  • Graduate Engineer, Larsen and Tubro Ltd, Chennai, India (July 1998 – May 1999)
Selected Recent Publications
  • Deleep R. Nair, Nihar R. Mohapatra, S. Mahapatra, S. Shukuri and J. D. Bude, “Effect of P/E scaling on drain disturb in flash EEPROMs under CHE and CHISEL operation”, IEEE Transaction on Devices and Materials Reliability, March 2004.
  • Nihar R. Mohapatra, Deleep R. Nair, S. Mahapatra, V. Ramgopal Rao, S. Shukuri and J. D. Bude, “CHISEL Programming Operation of Scaled NOR Flash EEPROMs – Effect of Voltage Scaling, Device Scaling and Technological Parameters”, IEEE Transaction on Electron Devices, Vol. 50, p. 2104, Oct 2003.
  • Nihar R. Mohapatra, Madhav P. Desai, Siva G. Narendra and V. Ramgopal Rao, "Modeling of Parasitic Capacitance in Deep Sub-Micrometer Conventional and High-K Gate Dielectric MOS Transistors", IEEE Transaction on Electron Devices, Vol. 50, p. 959, April 2003.
  • Nihar R. Mohapatra, Madhav P. Desai, Siva G. Narendra and V. Ramgopal Rao, “The Impact of High-K Gate Dielectrics on Deep Sub-Micrometer CMOS Device and Circuit Performance”, IEEE Transaction on Electron Devices, Vol. 49, p.826, May 2002.
 

Complete List of Publications